Business Wire

Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced a HES-DVM™ simulation ...
Automation

Microchip Technology announces Smart Embedded Vision suite of FPGA offerings

The Smart Embedded Vision initiative provides a suite of FPGA offerings that includes IP, hardware and tools for machine vision designs across the industrial, medical, broadcast, automotive, aerospace ...
New Electronics

Microchip extends low-power FPGA video and image processing solutions

Microchip, via its Microsemi subsidiary, has announced its Smart Embedded Vision initiative that provides solutions for designing intelligent machine vision systems with Microchip’s low-power ...
New Electronics

Microchip unveils new class of SoC FPGA

Microchip, via its Microsemi subsidiary, has announced an extension to its Mi-V ecosystem by unveiling the architecture for a new class of SoC FPGA. The new family combines the industry’s lowest power ...