GitHub

Viterbi Decoder Project.m

bit_to_symbol_map = [-3, -1, 1, 3]; % Mapping for 4-PAM (00 -> -3, 01 -> -1, 10 -> +1, 11 -> +3) restricted_symbol = -3; % Symbol restriction for the final stages in ...
GitHub

viterbi_decoder.sv.bak

if (noisy_in >= 8'hC0) q_out = 3'd0; // < -0.75V else if (noisy_in >= 8'hE0) q_out = 3'd1; // -0.75V to -0.5V else q_out = 3'd2; // -0.5V to -0.25V end else begin ...
EDN

Crafting a Custom Viterbi Decoder for WLAN Designs

Clearly, wireless LAN (WLAN) systems are a hot topic in the design community. With 802.11b taking off, and 802.11g and 802.11a coming quickly, much attention has been placed on building WLAN access ...
IEEE

Viterbi decoder architecture for interleaved convolutional code

Abstract: Sn area efficient high speed Veterbi decoder architecture, which is based on the state-parallel architecture with register exchange path memory structure, for interleaved convolutional code ...
Design-Reuse

Implementing the Viterbi Algorithm in Today's Digital Communications Systems

With the consumer demand for increased content and as a result, increasing high data bandwidth continuing to drive communications systems, coding for error control ...